A high performance CMOS comparator circuit

Zainal, Mohd Samian and Hamzah, Shipun Anuar and Kamaruddin, Nurul Aziyana (2005) A high performance CMOS comparator circuit. Kolej Universiti TeknologiTun Hussein Onn. (Unpublished)

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Abstract

In this paper, we present a method to design high performance CMOS comparator circuit with 0.35 //w technology. The comparator can be divided into three stages. The first stage of the comparator is the preamplifier which is increasing the input sensitivity and isolates the input side from the switching noise originating from the positive feedback stage. The second stage of the comparator is the positive feedback. This stage will determine which of the input signal is larger. The last stage is the output buffer amplifier which will amplifies the information and output a corresponding digital signal. These comparator have high gain with little delay and high slew rate for diving off the chip load capacitance. The simulation result shows that propagation delay and gain is 10ns and 2000.

Item Type:Other
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions:Faculty of Electrical and Electronic Engineering > Department of Robotic and Mechatronic Engineering
ID Code:1838
Deposited By:Mrs Hasliza Hamdan
Deposited On:04 Oct 2011 12:23
Last Modified:04 Oct 2011 12:23

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