A 93.36 dB, 161 MHz gain improved CMOS OTA for a 16 bit pipeline analog to digital converter

Mukahar, Nordiana and Ruslan, Siti Hawa (2010) A 93.36 dB, 161 MHz gain improved CMOS OTA for a 16 bit pipeline analog to digital converter. In: International Conference on Science and Social Research (CSSR 2010), 5-7 December 2010, Kuala Lumpur.

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Abstract

A gain modified CMOS Operational Transconductance Amplifier (OTA) for a 16 bit pipeline Analog-to-Digital Converter (ADC) is presented. The circuit is designed to be used for a high resolution and low sampling rate ADC. Gain boosting technique is implemented in the design to achieve high DC gain and settling time as required. Post layout simulations for a 5 pF load capacitance shows that OTA achieves a gain bandwidth of 161 MHz at a phase margin 93.14o with 93.27 dB DC gain. The settling time for an OTA is 163 ns for 0.1 % accuracy to achieve final value and consume power about 4.88 mW from 5 V power supply.

Item Type:Conference or Workshop Item (Paper)
Uncontrolled Keywords:ADC; common mode feedback; CMOS operational amplifier; fully differential folded cascade
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions:Faculty of Electrical and Electronic Engineering > Department of Electronic Engineering
ID Code:6113
Deposited By:Normajihan Abd. Rahman
Deposited On:15 Feb 2015 16:40
Last Modified:15 Feb 2015 16:40

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