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A hardware acceleration based on high-level synthesis approach for glucose-insulin analysis

Mohd Daud, Nur Atikah and Mahmud, Farhanahani and Jabbar, Muhamad Hairol (2016) A hardware acceleration based on high-level synthesis approach for glucose-insulin analysis. In: International Conference on Engineering, Science and Nanotechnology 2016 (ICESNANO 2016), 3–5 August 2016, Solo, Indonesia.

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Official URL: doi:10.1063/1.4968340

Abstract

In this paper, the research is focusing on Type 1 Diabetes Mellitus (T1DM). Since this disease requires a full attention on the blood glucose concentration with the help of insulin injection, it is important to have a tool that able to predict that level when consume a certain amount of carbohydrate during meal time. Therefore, to make it realizable, a Hovorka model which is aiming towards T1DM is chosen in this research. A high-level language is chosen that is C++ to construct the mathematical model of the Hovorka model. Later, this constructed code is converted into intellectual property (IP) which is also known as a hardware accelerator by using of high-level synthesis (HLS) approach which able to improve in terms of design and performance for glucose-insulin analysis tool later as will be explained further in this paper. This is the first step in this research before implementing the design into system-on-chip (SoC) to achieve a highperformance system for the glucose-insulin analysis tool.

Item Type: Conference or Workshop Item (Paper)
Subjects: R Medicine > R Medicine (General)
Divisions: Faculty of Electrical and Electronic Engineering > Department of Electronic Engineering
Depositing User: Mr. Mohammad Shaifulrip Ithnin
Date Deposited: 30 Sep 2019 03:22
Last Modified: 30 Sep 2019 03:22
URI: http://eprints.uthm.edu.my/id/eprint/11680
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