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Simulation study on NMOS gate length variation using TCAD tool

Sanudin, Rahmat and Sulong, Muhammad Suhaimi and Morsin, Marlia and Abd Wahab, Mohd Helmy Simulation study on NMOS gate length variation using TCAD tool. Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium.

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The process of scaling in silicon transistor has consistently resulted in smaller device geometry, higher device density and better performance. In conventional MOSFETs, control of Ioff for scaled devices requires very thin gate dielectrics and high doping concentrations. The industry roadmap predicts the barriers of continuous scaling will be due to physical limitations as well as practical technology. As the downscale of CMOS technology approaches physical limitations, the need arises for alternative device structures. Thus, this paper intends to study the effect of various gate lengths on the NMOS electrical characteristic by means of simulation study.

Item Type: Article
Uncontrolled Keywords: MOSFET ; doping profiles ; technology CAD (electronics)
Subjects: T Technology > T55.4-60.8 Industrial engineering. Management engineering
Divisions: Faculty of Electrical and Electronic Engineering > Department of Robotic and Mechatronic Engineering
Depositing User: Norfauzan Md Sarwin
Date Deposited: 08 Nov 2012 01:22
Last Modified: 08 Nov 2012 01:22
URI: http://eprints.uthm.edu.my/id/eprint/3230
Statistic Details: View Download Statistic

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