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Process and device simulation of 80nm CMOS inverter using Sentaurus Synopsys TCAD

Sulong, Muhammad Suhaimi and Jamry, Asyiatul Asyikin and Shuib, Siti Maryaton Shuadah and Sanudin, Rahmat and Morsin, Marlia and Sahdan, Mohd Zainizan (2008) Process and device simulation of 80nm CMOS inverter using Sentaurus Synopsys TCAD. In: FEIIC Symposium on Engineering and Technology, 15-16 December 2008, Kuching, Sarawak.


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Nowadays, the simple manufacturing process of CMOS transistor is widely used in digital design implementation. Using the latest technology in fabrication, the sizes of semiconductor devices are ever shrinking toward the nanotechnology. This paper presents the development of 80nm gate length of CMOS inverter with modification of the theoretical values in order to obtained more accurate process parameters. Simulation of the process and device fabrication using Sentaurus Synopsys TCAD has been carried out and the electrical characteristics of the device were studied and analyzed. The result of the study indicates that the operational of CMOS inverter was at VT = 0.499V, Ioff =79.08pA/ m and IDSAT = 429.3 A/ m for NMOS device. The values were then compared with 90nm CMOS inverter. The study also found that the leakage current of 80nm CMOS transistor is almost twice higher than 90nm CMOS transistor.

Item Type: Conference or Workshop Item (Paper)
Uncontrolled Keywords: CMOS, gate length, Sentaurus Synopsys TCAD, nanotechnology.
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Faculty of Electrical and Electronic Engineering > Department of Electrical Technology
Depositing User: Normajihan Abd. Rahman
Date Deposited: 07 Jan 2010 04:10
Last Modified: 15 Apr 2015 01:13
URI: http://eprints.uthm.edu.my/id/eprint/79
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