UTHM Institutional Repository

Load-balanced adaptive routing in network-on-chip

Ab.Rahman, Munirah and Marsono, Muhammad Nadzir (2014) Load-balanced adaptive routing in network-on-chip. In: 5th International Graduate Conference on Engineering Science & Humanity 2014 (IGCESH 2014), 19-21 August 2014, Johor Bahru, Malaysia.

Full text not available from this repository.


Network-on-Chips (NoCs)are scalable interconnect architecture for currentand future Multiprocessor Systems on Chips (MPSoCs) that use micro-networkbased interconnect architectures to connect computation cores [1].There are several criteria thatcontribute to effectiveNoC interconnection. Routing policy plays the most important role in assuring the NoC overall performance.Congestionaffects NoC performance by increasing the network latency, making it hard to meetQuality-of-Services (QoS)constraints. To alleviate congestionon NoC, networkload must be balanced by equalizingtraffic distribution over thenetwork and routepackets through less congested path.Works in [2] and [3] proposed several adaptive routing algorithms that are capableto balance network load effectively due to its ability to adapt with dynamic network condition.

Item Type: Conference or Workshop Item (Paper)
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK5101-5865 Telecommunication. Telegraph.
Divisions: Faculty of Electrical and Electronic Engineering > Department of Computer Engineering
Depositing User: Mrs Hasliza Hamdan
Date Deposited: 13 Aug 2018 03:32
Last Modified: 13 Aug 2018 03:32
URI: http://eprints.uthm.edu.my/id/eprint/9772
Statistic Details: View Download Statistic

Actions (login required)

View Item View Item