Simulation of variable I-layer thickness effects on silicon pin diode I-V characteristics

Mat Jubadi, Warsuzarina and Mohammad Noor, Siti Norafzaniza Simulation of variable I-layer thickness effects on silicon pin diode I-V characteristics. Universiti Tun Hussein Onn Malaysia. (Unpublished)

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Abstract

PIN Diode gains its name from the idealized intrinsically doped. I-layer, sandwiched between a P-type and N-type layer. The N-layer of PIN diode was doped with Arsenic and the P-layer doped with Boron. The performance of the PIN diode primarily depends on the chips geometry and the nature of the semiconductor material, particularly in the I-layer. This paper presents a simulation of four I-layer thickness (5um, 20um, 30um and 50um) effect on the silicon PIN diode I-V characteristics carried out by using Sentaurus Technology Computer Aided Design (TCAD). The major goals of the simulation work are to study the I-layer thickness (d) effects on diode I-V characteristics and to implement PIN diode fabrication process flow into a commercially available process environment. The important parameters of PIN diode were analyzed to study the effect of PIN diode I-V characteristics.

Item Type:Other
Uncontrolled Keywords:pin diode; i-layer; thickness; sentaurus TCAD
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics
Divisions:Faculty of Electrical and Electronic Engineering > Department of Computer Engineering
ID Code:3023
Deposited By:Normajihan Abd. Rahman
Deposited On:13 Feb 2013 16:31
Last Modified:13 Feb 2013 16:31

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