Naim Kasiran, Mohd Amirul and Ponniran, Asmarashid and Yatim, Mohd Hafizie and Itoh, Jun-ichi (2020) Evaluation of high power density achievement of optimum 4-level capacitor-clamped DC–DC boost converter with passive lossless snubber circuit by using Pareto-Front method. IET Power Electronics, 13 (1). pp. 40-49. ISSN 1755-4543
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Abstract
This study presents the evaluation of the proposed optimum 4-level capacitor-clamped DC–DC boost converter (CCBC) for high power density achievement by using Pareto-Front method. The 4-level CCBC with considering high switching frequency can greatly reduce the inductor size and volume. High switching frequency caused the switching devices to suffer high semiconductor losses. Consequently, the cooling device volume is increased as well. Thus, this study presents softswitching technique in the 4-level CCBC for semiconductor losses reduction. The combination of optimum design of inductor, improvement of circuit structure and soft-switching technique may lead to the highest power density of the converter. A 400 W of the 4-level CCBC converter is designed and experimentally verified. The results show that the inductance and inductor volume required in the 4-level CCBC is reduced by 88.89 and 80.75%, respectively. Besides, Pareto-Front curve shows the highest power density of soft-switching technique with the proposed 4-level CCBC is 6.51 kW/dm3 at 800 kHz of switching frequency with efficiency of 97.20%.
Item Type: | Article |
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Uncontrolled Keywords: | NIL |
Subjects: | T Technology > T Technology (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering > TK7800-8360 Electronics |
Divisions: | Faculty of Electrical and Electronic Engineering > Department of Electrical Engineering |
Depositing User: | Miss Afiqah Faiqah Mohd Hafiz |
Date Deposited: | 03 Jan 2022 02:29 |
Last Modified: | 03 Jan 2022 02:29 |
URI: | http://eprints.uthm.edu.my/id/eprint/4976 |
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